The advantages of packet-based networks are well known. Such systems allow more flexible and efficient use of bandwidth than circuit switched systems.
The recent rapid increase in transmission capacity achieved by optical transmission systems far exceeds the improvements in electronic processing speeds. The conversion of high data rate optical signals into the electrical domain and the processing of such signals provides difficulties and may limit the data handling rates within optical networks. However, this conversion and processing can be required for performing switching and routing functions, and is recognised as causing a restriction.
There have been proposals which provide all-optical networks in which switching and routing take place in the optical domain, thereby avoiding the electrical conversion and processing stages. One proposal involves the use of time-shift keying, but the fine tolerances in timing and delay compensation present serious difficulties.
An alternative proposal is to provide a packet header with information optically encoded at a lower data rate than the data rate of the packet payload. This enables opto-electric conversion circuitry to be employed which has a lower detection bandwidth than that which would be required to carry out opto-electric conversion of the packet payload. Thus, low cost electronics can be used to enable the header to be read for routing purposes, and high speed conversion is required only when the payload data is to be read, at the destination node for the particular signal. The invention concerned specifically with optical data packets of this type.
One particular problem which arises in asynchronous transmission, such as packet-based transmission, is deriving a clock signal to enable decoding of the packet data. This may be achieved using burst mode receivers or over-sampling receivers, but these are complex and expensive to implement.
Even with the low data rate packet header, a clock signal still conventionally needs to be extracted in order to enable the header data to be read. This may conventionally be achieved using a phase locked loop. A problem with this approach is the long time taken to synchronise the clock extraction circuit, corresponding to many bits of the data structure.
The article “Self-Clocking Scheme for Bit Synchronisation in Ultrafast Packet Switching Transparent Optical Networks” by A. Bononi et al, Electronics Letters Vol. 29, No. 10 pages 872-873 discloses an all optical header reading circuit in which a self-clocking arrangement is provided. To achieve this, a low data rate clock signal is provided in the packet structure. This is used to provide timing instants for reading data from the packet header, which is spread at the low data rate throughout the packet structure. A problem with this approach is that the packet payload is distorted, and the packet header is no longer a separate part of the packet structure.